(*) Speakers bios: ========================================================================== Enric Musoll, Ph.D. ConSentry Networks 1690 McCandless Dr. Milpitas, CA 95035 (408) 956-2128 enric@consentry.com Education --------- (*) PhD in Computer Science: Department of Computer Architecture at the Polytechnic University of Catalonia, Barcelona, Spain, European Union. 6/96 (*) Masters and Bachelor of Science in Computer Science: Computer Science Faculty at the Polytechnic University of Catalonia, Barcelona, Spain, European Union. 6/93 Professional Experience ----------------------- (*) 11/02-present, Co-founder and Senior Design Engineer at ConSentry Networks, Inc., Milpitas CA, USA (*) 1/02-10/02, Architect at Flowstorm, Inc., San Jose CA, USA (*) 8/99-12/1, Architect/Staff Design Engineer at Clearwater Networks/XStream Logic, Inc., Los Gatos CA, USA (*) 12/96-8/99, Senior Design Engineer at Cyrix/National Semiconductor Corp., Santa Clara CA, USA Publications ------------ (*) Ph.D. dissertation [] Enric Musoll, "High-Level and Logic Synthesis Techniques for Low Power", Directed by Dr. Jordi Cortadella. Presented at the Dept. of Computer Architecture at the Polytechnic University of Catalonia, Barcelona, Spain, European Union. 7/96 (*) Conference publications and presentations [] S. Melvin, M. Nemirovsky, E. Musoll, J. Huynh, R. Milito, H. Urdaneta and K. Saraf. "A Massive Multi-threaded Packet Processor", In Proceedings of the "Network Processor Workshop/HPCA", Anaheim, CA, USA. 2/03 [] Enric Musoll, "Estimation of the upper-bound useless energy dissipation in a high- performance processor", In Proceedings of the "Kool Chips Workshop", Monterey, CA, USA. 12/00 [] Enric Musoll, "Predicting the Usefulness of a Block Result: a Micro-architectural Technique for High-performance Low-power Processors", In Proceedings of the "IEEE International Symposium on Microarchitecture", Haifa, Israel. 11/99 [] Enric Musoll, "Micro-architecture Estimation of the Useless Power Consumption of a High-performance Processor", In Proceedings of the "XII Symposium on Integrated Circuits and Systems Design", Natal, Brazil. 9/99 [] Enric Musoll and Mario Nemirovsky, "A Study on the Performance of Two-level Exclusive Caching", In Proceedings of the "XI Symposium on Computer Architecture and High Performance Computing", Natal, Brazil. 9/99 [] Tomas Lang, Enric Musoll and Jordi Cortadella, "Extension of the Working-Zone Encoding Method to Reduce the Energy of the Microprocessor Data Bus", In Proceedings of the "International Conference on Computer Design", Austin TX, USA. 10/98 [] Enric Musoll, Tomas Lang and Jordi Cortadella, "Reducing the Energy of Address and Data Buses with the Working-Zone Encoding Technique and its Effect on Multimedia Applications". In Proceedings of the "Power-Driven MicroArchitectural Workshop", Barcelona, Spain, European Union. 6/98 [] Enric Musoll, Tomas Lang and Jordi Cortadella, "Exploiting the Locality of Memory References to Reduce the Address Bus Energy", In Proceedings of the "International Symposium on Low Power Electronics and Design", Monterey CA, USA. 8/97 [] Tomas Lang, Enric Musoll and Jordi Cortadella, "Redundant Adder for Reduced Output Transitions", In Proceedings of the "Conference on Design of Integrated Circuits and Systems", Sitges, Spain, European Union. 10/96 [] Enric Musoll and Jordi Cortadella, "Optimizing CMOS Circuits for Low Power Using Transistor Reordering", In Proceedings of the "European Design and Test Conference", Paris, France, European Union. 3/96 [] Enric Musoll and Jordi Cortadella, "Low-power Array Multipliers with Transition-retaining Barriers", In Proceedings of the {\em International Workshop on Power, Timing Modeling Optimization and Simulation", Oldenburg, Germany, European Union. 10/95 [] Enric Musoll and Jordi Cortadella, "Scheduling and Resource Binding for Low Power", In Proceedings of the "International Symposium on System Synthesis", Cannes, France, European Union. 9/95 [] Enric Musoll and Jordi Cortadella, "High-Level Synthesis Techniques for Reducing the Activity of Functional Units", In Proceedings of the "International Symposium on Low Power Electronics and Design", Dana Point CA, USA. 4/95 (*) Journal publications [] Enric Musoll "Speculating to Reduce Unnecessary Power Consumption", In "ACM Transactions on Embedded Computer Systems", Vol. 4, No. 2. (11/03) [] S. Melvin, M. Nemirovsky, E. Musoll, J. Huynhm, R. Milito, H. Urdaneta, and K. Saraf. Chapter "A Massively Multithreaded Processor" of the book "Network Processor Design: Issues and Practices", Volume 2, Morgan Kaufman, 03 Edited by P. Crowley, M. Franklin, H. Hadimioglu, and P. Onufryk. [] Enric Musoll, Tomas Lang and Jordi Cortadella, "Working-Zone Encoding for Reducing the Energy in Microprocessor Address Buses", In "IEEE Transactions on VLSI, Special Issue on Low-power Electronics and Design", Vol. 6, No. 4. 12/98 [] Enric Musoll and Jordi Cortadella, "Register-transfer Level Transformations for Low-power Data-paths", In "Integrated Computer-Aided Engineering Journal", Vol. 5, Num. 4. 98 [] Tomas Lang, Enric Musoll and Jordi Cortadella, "Individual Flip-flops with Gated Clocks for Low-power Datapaths", In "IEEE Transactions on Circuits and Systems, Special Issue on Wireless Communications", Vol. 44, No. 7. 6/97 ========================================================================== Rotem Efraim efraim.rotem@intel.com Education 1988 to 1990 – Graduate studies – Signal processing and Cryptography Technion, Israel Institute of Technology 1985 to 1988 – Bachelor of Science, Electrical Engineering, Cum Laude Technion, Israel Institute of Technology Employment Intel Corporation Jan-1995 to Present IDC Haifa, Israel and Folsom CA, USA Computer Architect Working on the definition development and validation of various Intel® high-end CPU architectures, starting with Pentium® processor with MMX™ technology, various Pentium® - 4 products and the recently introduced Intel® Centrino™ mobile technology. Current position - the power architect of the Intel® Centrino™ mobile technology. Technion - Israel Institute of Technology Haifa, Israel Instructor – Parallel computer lab in the field of power and thermal management, power aware architectures and power aware scheduling. EliaShim Inc. June-1998 to Dec-1994 Haifa, Israel CTO and Vice President A founder and R&D manager of the company. EliaShim developed data security and Encryption systems, copy protection devices, PC access control solutions and Anti-Virus products. Products consisted of combined S/W and H/W. Responsible for the product definition, development and manufacturing. Preparation of business plans and private placements in the company. Elbit Systems April-1993 to Aug-1995 Haifa, Israel System Engineer Development of mobile computing and control system. Rigid central computer with real time operating system. Implementation of distributed data entry and display units, remote sensors and communication protocols. H/W development and responsibility for the H/W and S/W integration. Publications and Patents July 1996 - DTTC ( Design and Test Technology), Paper presentation – Generating and managing test patterns for the Intel® Pentium® processor with MMX™ technology July 2003 - DTTC, Paper presentation – The Intel® Centrino™ mobile technology power management features August 2004 – DTTC Journal, An adaptive thermal management algorithm and implementation June 2004 – ISCA, Evaluation of power management features of the Intel® Centrino™ mobile technology Author of 5 textbooks in the field logic design, Intel Architecture programming and assembly language programming. IDF publications. Holding 21 patents, patent pending and patent files in the field of data security and CPU power management.